SMTS Silicon Design Engineer (Physical design Lead with 12+Yrs )

Apr 17, 2024
Hyderabad, India
... Not specified
... Intermediate
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




SMTS SILICON DESIGN ENGINEER

THE ROLE: 

As a member of the Silicon Design group, you will help bring to life cutting-edge designs. You will work closely with the architecture, IP design, and Integration teams to achieve best quality and PPA for complex IPs. 

 


THE PERSON:

A successful candidate will work with senior silicon design engineers. Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities.


KEY RESPONSIBLITIES:

  • Own critical designs and drive to convergence from RTL-to-GDSII - Synthesis, floor-planning, place and route, timing closure and signoff
  • Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoffs for design closure.
  • Develop and improve physical design methodologies and customize recipes across various implementation steps to optimize PPA.
  • Implement floor plan, synthesis, placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff.
  • Handling different PNR tools from various vendors - Synopsys, Cadence, Mentor.

PREFERRED EXPERIENCE:

  • 12+ years of professional experience in physical design, preferably with high-performance designs.
  • Must have closed high-performance IPs - CPU, GPU, DPU, memory controller etc.
  • Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality.
  • Must have in-depth experience on design partitioning, floor planing and EMIR closure.
  • Versatility with scripts to automate design flow - Perl, TCL & Python.
  • Strong communication skills, and work with multi-geographic teams.
  • Analytical & problem-solving skills and pronounced attention to detail. 

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

#LI-SR4




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER

THE ROLE: 

As a member of the Silicon Design group, you will help bring to life cutting-edge designs. You will work closely with the architecture, IP design, and Integration teams to achieve best quality and PPA for complex IPs. 

 


THE PERSON:

A successful candidate will work with senior silicon design engineers. Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities.


KEY RESPONSIBLITIES:

  • Own critical designs and drive to convergence from RTL-to-GDSII - Synthesis, floor-planning, place and route, timing closure and signoff
  • Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoffs for design closure.
  • Develop and improve physical design methodologies and customize recipes across various implementation steps to optimize PPA.
  • Implement floor plan, synthesis, placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff.
  • Handling different PNR tools from various vendors - Synopsys, Cadence, Mentor.

PREFERRED EXPERIENCE:

  • 12+ years of professional experience in physical design, preferably with high-performance designs.
  • Must have closed high-performance IPs - CPU, GPU, DPU, memory controller etc.
  • Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality.
  • Must have in-depth experience on design partitioning, floor planing and EMIR closure.
  • Versatility with scripts to automate design flow - Perl, TCL & Python.
  • Strong communication skills, and work with multi-geographic teams.
  • Analytical & problem-solving skills and pronounced attention to detail. 

 

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering 

#LI-SR4

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