WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

AMD together we advance_

SMTS SILICON DESIGN ENGINEER

Job Summary: 

This exciting position in the AMD Networking Technology and Solution Group (NTSG) as the MTS ASIC verification engineer will provide the individual with an opportunity to build a strong technical career in AMD next generation Data Center Networking Acceleration products. In the Staff Verification role, you will work as part of a team or lead a team which handles IP, Subsystem, Systems design verification in the data center networking domain. Verification lead is expected to have or learn the Data Center networking standards, take part in providing inputs during solution architecture, responsible for creating the initial product verification methodology, selecting the testing environments, and developing testing plans to test functionality, performance etc. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. 

Job Description:  

A major part of your responsibility will be to take an independent verification role or drive a team in developing TB architecture definition and TB infrastructure/test coding development for Data Center Networking IP/Systems:  

• Technical leadership in driving projects by understanding the product specifications and deriving the TB architectures. 
• Developing verification plan, test plan, coverage plan, assertions etc. 
• Developing block level and multi block level verification environments & reusable verification components based on SV/UVM methodology. 
• Coverage metrics to ensure conformity, running regressions, debug test failures and regression management. 
• Knowledge and working experience with any of the complex protocols like PCIe/Ethernet/NVMe/RDMA/Cryptography/Others – is necessary. 
• Knowledge in Network acceleration applications such as IPsec, Tunneling, Congestion, vSwitch, OVS, – added advantage.
• Expertise in Scripting languages like Perl/Python. 
• Knowledge in AMBA AXI, APB etc. - an advantage 
• Ability to work collaboratively with other engineers and have good ownership and leadership skills. Familiarity in collaborating across Geos.
• Assisting validation teams with on board-level test issues, educating design teams on verification methodology. 
• Contributing to process improvement in verification methodologies that impact the productivity.  
• Strong oral and written communication skills, problem solving and analytical skills. 

Education and Experience: 

• Masters/ Bachelors in EE/EC/CS with10+ years of experience in IP/SoC/ASIC Verification. 

#LI-SR4

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER

Job Summary: 

This exciting position in the AMD Networking Technology and Solution Group (NTSG) as the MTS ASIC verification engineer will provide the individual with an opportunity to build a strong technical career in AMD next generation Data Center Networking Acceleration products. In the Staff Verification role, you will work as part of a team or lead a team which handles IP, Subsystem, Systems design verification in the data center networking domain. Verification lead is expected to have or learn the Data Center networking standards, take part in providing inputs during solution architecture, responsible for creating the initial product verification methodology, selecting the testing environments, and developing testing plans to test functionality, performance etc. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. 

Job Description:  

A major part of your responsibility will be to take an independent verification role or drive a team in developing TB architecture definition and TB infrastructure/test coding development for Data Center Networking IP/Systems:  

• Technical leadership in driving projects by understanding the product specifications and deriving the TB architectures. 
• Developing verification plan, test plan, coverage plan, assertions etc. 
• Developing block level and multi block level verification environments & reusable verification components based on SV/UVM methodology. 
• Coverage metrics to ensure conformity, running regressions, debug test failures and regression management. 
• Knowledge and working experience with any of the complex protocols like PCIe/Ethernet/NVMe/RDMA/Cryptography/Others – is necessary. 
• Knowledge in Network acceleration applications such as IPsec, Tunneling, Congestion, vSwitch, OVS, – added advantage.
• Expertise in Scripting languages like Perl/Python. 
• Knowledge in AMBA AXI, APB etc. - an advantage 
• Ability to work collaboratively with other engineers and have good ownership and leadership skills. Familiarity in collaborating across Geos.
• Assisting validation teams with on board-level test issues, educating design teams on verification methodology. 
• Contributing to process improvement in verification methodologies that impact the productivity.  
• Strong oral and written communication skills, problem solving and analytical skills. 

Education and Experience: 

• Masters/ Bachelors in EE/EC/CS with10+ years of experience in IP/SoC/ASIC Verification. 

#LI-SR4