SMTS Silicon Design Engineer

Feb 28, 2024
Shanghai, China
... Not specified
... Intermediate
Full time
... Office work


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We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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SMTS SILICON DESIGN ENGINEER

THE ROLE:

AMD S3 team is the Semi-Customized Unit. We design the APUs mainly for consoles. Design Verification team is part of the whole chip design team and responsible to make sure the RTL quality. You will be working with front-end and IP team to verify the chip pervasive logic and  low power management logic.

 

 

THE PERSON:

Has related knowledge for design verification and good debug skills. Has good communication skills and be able to work both independently and in a team.

 

KEY RESPONSIBILITIES:

  • Develop test plan according to the specification and review with Architect and SOC/IP designer.
  • Develop test scenarios to verify the design and analyze the coverage
  • Complete the verification task before TO.

 

PREFERRED EXPERIENCE:

  • Proficient in one kind of simulation tool like VCS, have good debug skill.
  • Familiar with SystemVerilog/C/C++ language.
  • Developing UVM based verification frameworks and testbenches, processes and flows
  • Good understanding and hands-on experience in the UVM concepts and SystemVerilog language.
  • Familiar with script language like SHELL/Perl/Python.
  • Have experience on SoC functional verification.
  • Have experience on IP/SoC integration.
  • Good written and spoken English
  • Leadship experience is a good plus

 

ACADEMIC CREDENTIALS:

  • Bachelor or Master, major in EE, CS or related area + 8 years working experience

LOCATION:

Shanghai

 

#LI-VC1




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS SILICON DESIGN ENGINEER

THE ROLE:

AMD S3 team is the Semi-Customized Unit. We design the APUs mainly for consoles. Design Verification team is part of the whole chip design team and responsible to make sure the RTL quality. You will be working with front-end and IP team to verify the chip pervasive logic and  low power management logic.

 

 

THE PERSON:

Has related knowledge for design verification and good debug skills. Has good communication skills and be able to work both independently and in a team.

 

KEY RESPONSIBILITIES:

  • Develop test plan according to the specification and review with Architect and SOC/IP designer.
  • Develop test scenarios to verify the design and analyze the coverage
  • Complete the verification task before TO.

 

PREFERRED EXPERIENCE:

  • Proficient in one kind of simulation tool like VCS, have good debug skill.
  • Familiar with SystemVerilog/C/C++ language.
  • Developing UVM based verification frameworks and testbenches, processes and flows
  • Good understanding and hands-on experience in the UVM concepts and SystemVerilog language.
  • Familiar with script language like SHELL/Perl/Python.
  • Have experience on SoC functional verification.
  • Have experience on IP/SoC integration.
  • Good written and spoken English
  • Leadship experience is a good plus

 

ACADEMIC CREDENTIALS:

  • Bachelor or Master, major in EE, CS or related area + 8 years working experience

LOCATION:

Shanghai

 

#LI-VC1

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