WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

SMTS FORMAL VERIFICATION ENGINEER

THE ROLE: 

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the Graphics IP Development Team, you will work closely with the architecture, IP design, and IP verification teams to achieve first pass silicon success.

THE PERSON:

You have a passion for verifying modern, complex processor architecture and digital design. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites / timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBLITIES:

• Understand the architecture of the Graphics IP and functional block being verified

• Work with Architects and logic designers to shape micro-architecture of digital design blocks, write verification architecture specification
• Perform Formal Property and Data Path Validation with the latest industry standard tools for scalable digital designs
• Write Formal constraints and debug functional, performance, and power related issues
• Work closely with simulation verification engineers to complement design coverage and aid in verification closure
• Guide and mentor junior engineers

PREFERRED EXPERIENCE:

• Minimum of 3 years experience using various formal validation tools and methodologies on complex digital designs
• Strong knowledge of C / C++ and Verilog / SystemVerilog
• Experience using industry standard tools and adaptability to utilize home grown tools
• Good understanding of computer organization / architecture
• Strong analytical / problem solving skills and pronounced attention to details
• Self-starter / independently drive tasks to completion
• Strong interpersonal and communication skills
• Prior experience with graphics design / pipelining and/or cache design is a plus

ACADEMIC CREDENTIALS:

• Master's degree with at least 7 years or Bachelor's degree with at least 10 years of working experience in ASIC / IP development

#LI-PU1

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SMTS FORMAL VERIFICATION ENGINEER

THE ROLE: 

As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the Graphics IP Development Team, you will work closely with the architecture, IP design, and IP verification teams to achieve first pass silicon success.

THE PERSON:

You have a passion for verifying modern, complex processor architecture and digital design. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites / timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBLITIES:

• Understand the architecture of the Graphics IP and functional block being verified

• Work with Architects and logic designers to shape micro-architecture of digital design blocks, write verification architecture specification
• Perform Formal Property and Data Path Validation with the latest industry standard tools for scalable digital designs
• Write Formal constraints and debug functional, performance, and power related issues
• Work closely with simulation verification engineers to complement design coverage and aid in verification closure
• Guide and mentor junior engineers

PREFERRED EXPERIENCE:

• Minimum of 3 years experience using various formal validation tools and methodologies on complex digital designs
• Strong knowledge of C / C++ and Verilog / SystemVerilog
• Experience using industry standard tools and adaptability to utilize home grown tools
• Good understanding of computer organization / architecture
• Strong analytical / problem solving skills and pronounced attention to details
• Self-starter / independently drive tasks to completion
• Strong interpersonal and communication skills
• Prior experience with graphics design / pipelining and/or cache design is a plus

ACADEMIC CREDENTIALS:

• Master's degree with at least 7 years or Bachelor's degree with at least 10 years of working experience in ASIC / IP development

#LI-PU1