Sr. Silicon Design Engineer

Mar 31, 2024
Austin, United States
... Not specified
... Senior
Full time
... Office work


WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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Job Role and Responsibility: AMD, Inc., is hiring Sr. Silicon Design Engineer to Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing, employing knowledge of electronic theory. Perform project and task scoping and scheduling. Meet with internal customers to discuss project deliverables, requirements, use cases, etc. Meet with RTL designers to discuss new project design specifications and verification requirements. Develop a new synthesizable Bus Functional Model (BFM) in System Verilog that simulates the behavior of bus interfaces and protocols for emulation use in verifying system-level functionality. Create a new behavioral model in C++ that simulates functional operations and timing behavior for design verification use. Verify new design and performance monitoring features. Design test plans to outline testing requirements and strategies - identifying the desired coverage goals, defining test scenarios, and determining the appropriate test scopes. Develop active UVM testbenches in Perl and System Verilog, which includes creating the necessary stimuli, test sequences to drive the RTL design, monitors to capture responses, scoreboards to verify functionality, and functional coverage to ensure all possible cases are tested. Debug RTL functional design errors that require understanding of digital design principles, Verilog, System Verilog + Universal Verification Methodology (UVM) testbench, and design specification, using EDA tools (Synopsys Verdi) to analyze simulation waveform outputs and debugging techniques to craft simulation debug logs. Perform functional coverage and code coverage analysis to assess the completeness and effectiveness of the test plan. Write documentations for verification specifications and feature development statuses.

 

Multiple openings.  Qualified applicants click “APPLY NOW” button to apply online.

 

Travel required: NO         

Qualifications: Degree required

Master’s degree or foreign equivalent in Computer Science, Computer Engineering, Electrical Engineering, or Electronics Engineering.

Qualifications: Amount and type of experience required: One (1) year of experience in the job offered or closely related engineering role.

Alternate combination of education and experience: Employer will accept alternate combination of employment and experience: bachelor’s degree (or foreign equivalent) in Computer Science, Computer Engineering, Electrical Engineering, or Electronics Engineering and three (3) years of progressive, post-baccalaureate experience in the job offered or closely related engineering role.

Specific skills required: The following skills are required:

Position requires a master’s degree in accepted field and one (1) year of experience with the following technologies and/or skills:

  • ASIC design and verification;
  • Developing UVM testbenches;
  • Verilog, System Verilog, or UVM;
  • C, C++, Python, Ruby, or Shell;
  • Synopsys Verdi for design specification;
  • GPU architecture, CPU architecture, or Computer Architecture; and
  • RTL design, verification, and debugging.

 

Alternatively, position requires a Bachelor’s degree in accepted field and three (3) years of experience with the following technologies and/or skills:

  • ASIC design and verification;
  • Developing UVM testbenches;
  • Verilog, System Verilog, or UVM;
  • C, C++, Python, Ruby, or Shell;
  • Synopsys Verdi for design specification;
  • GPU architecture, CPU architecture, or Computer Architecture; and
  • RTL design, verification, and debugging.

 

 

#LI-DP1




At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Job Role and Responsibility: AMD, Inc., is hiring Sr. Silicon Design Engineer to Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing, employing knowledge of electronic theory. Perform project and task scoping and scheduling. Meet with internal customers to discuss project deliverables, requirements, use cases, etc. Meet with RTL designers to discuss new project design specifications and verification requirements. Develop a new synthesizable Bus Functional Model (BFM) in System Verilog that simulates the behavior of bus interfaces and protocols for emulation use in verifying system-level functionality. Create a new behavioral model in C++ that simulates functional operations and timing behavior for design verification use. Verify new design and performance monitoring features. Design test plans to outline testing requirements and strategies - identifying the desired coverage goals, defining test scenarios, and determining the appropriate test scopes. Develop active UVM testbenches in Perl and System Verilog, which includes creating the necessary stimuli, test sequences to drive the RTL design, monitors to capture responses, scoreboards to verify functionality, and functional coverage to ensure all possible cases are tested. Debug RTL functional design errors that require understanding of digital design principles, Verilog, System Verilog + Universal Verification Methodology (UVM) testbench, and design specification, using EDA tools (Synopsys Verdi) to analyze simulation waveform outputs and debugging techniques to craft simulation debug logs. Perform functional coverage and code coverage analysis to assess the completeness and effectiveness of the test plan. Write documentations for verification specifications and feature development statuses.

 

Multiple openings.  Qualified applicants click “APPLY NOW” button to apply online.

 

Travel required: NO         

Qualifications: Degree required

Master’s degree or foreign equivalent in Computer Science, Computer Engineering, Electrical Engineering, or Electronics Engineering.

Qualifications: Amount and type of experience required: One (1) year of experience in the job offered or closely related engineering role.

Alternate combination of education and experience: Employer will accept alternate combination of employment and experience: bachelor’s degree (or foreign equivalent) in Computer Science, Computer Engineering, Electrical Engineering, or Electronics Engineering and three (3) years of progressive, post-baccalaureate experience in the job offered or closely related engineering role.

Specific skills required: The following skills are required:

Position requires a master’s degree in accepted field and one (1) year of experience with the following technologies and/or skills:

  • ASIC design and verification;
  • Developing UVM testbenches;
  • Verilog, System Verilog, or UVM;
  • C, C++, Python, Ruby, or Shell;
  • Synopsys Verdi for design specification;
  • GPU architecture, CPU architecture, or Computer Architecture; and
  • RTL design, verification, and debugging.

 

Alternatively, position requires a Bachelor’s degree in accepted field and three (3) years of experience with the following technologies and/or skills:

  • ASIC design and verification;
  • Developing UVM testbenches;
  • Verilog, System Verilog, or UVM;
  • C, C++, Python, Ruby, or Shell;
  • Synopsys Verdi for design specification;
  • GPU architecture, CPU architecture, or Computer Architecture; and
  • RTL design, verification, and debugging.

 

 

#LI-DP1

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