Hsinchu, Taiwan
Not specified
Senior
Office work
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.
AMD together we advance_
Senior Package Design CAD Engineer
THE PERSON:
Candidate will act as the primary interface with EDA vendors, SOC foundries and packaging OSAT to develop internal 2.5D/3D package EDA reference flows. He/She will also work closely with internal SoC and packaging design teams to define and deploy the reference flows.
KEY RESPONSIBILITIES:
- Determine package architecture and design, assess package performance and cost tradeoff, collaborate with cross-functional team for package technology and design rule development and drive package structure planning to form working POR
- Work with silicon architecture, substrate layout designer to create BGA ball map for layout feasibility & PCB routing.
- Work with SI/PI engineer for optimizing electrical performance including substrate s-parameter PDN/SSN/X-talk/IL/RL/Inductance/EM.
PREFERRED EXPERIENCE:
Development level understanding of 2.5D/3D packaging EDA reference flows and EDA landscape
Tool development and automation experience for Cadence APD/SIP, Cadence Innovus, Cadence Virtuoso, Mentor Xpedition, Zuken Design Force, Valor, DRC/LVS, etc
Package design and SOC design flow understanding from netlist creation to IC Tape out and Package tooling
Strong experience of interaction with internal and external EDA and internal stakeholders
Excellent interpersonal and analytical skills with the ability to work independently
ACADEMIC CREDENTIALS:
- Master of Science degree in Electrical & Electronics Engineering with 3-5+ years experience
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Senior Package Design CAD Engineer
THE PERSON:
Candidate will act as the primary interface with EDA vendors, SOC foundries and packaging OSAT to develop internal 2.5D/3D package EDA reference flows. He/She will also work closely with internal SoC and packaging design teams to define and deploy the reference flows.
KEY RESPONSIBILITIES:
- Determine package architecture and design, assess package performance and cost tradeoff, collaborate with cross-functional team for package technology and design rule development and drive package structure planning to form working POR
- Work with silicon architecture, substrate layout designer to create BGA ball map for layout feasibility & PCB routing.
- Work with SI/PI engineer for optimizing electrical performance including substrate s-parameter PDN/SSN/X-talk/IL/RL/Inductance/EM.
PREFERRED EXPERIENCE:
Development level understanding of 2.5D/3D packaging EDA reference flows and EDA landscape
Tool development and automation experience for Cadence APD/SIP, Cadence Innovus, Cadence Virtuoso, Mentor Xpedition, Zuken Design Force, Valor, DRC/LVS, etc
Package design and SOC design flow understanding from netlist creation to IC Tape out and Package tooling
Strong experience of interaction with internal and external EDA and internal stakeholders
Excellent interpersonal and analytical skills with the ability to work independently
ACADEMIC CREDENTIALS:
- Master of Science degree in Electrical & Electronics Engineering with 3-5+ years experience
