WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

AMD together we advance_

SENIOR SOC DESIGN ENGINEER

THE ROLE: 

We are looking for an adaptive, self-motivative design engineer to join our growing team. As a key contributor, you will be part of a AI Engine Design team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The AI Group furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. 

THE PERSON: 

You have a passion for modern, complex processor architecture, digital design and delivering continuous improvement in flows through automation  in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES: 

• RTL Design: Designing and implementing digital logic circuits using Verilog or System Verilog

• IP Integration: Integrating and customizing IP blocks into SOC design.

• Work closely with the RTL design, verification, and physical design teams to identify areas for automation and create solutions to improve productivity and quality.

• Continuously improve the automation process by exploring new tools and technologies.

• Integrate various design tools and flows to create a cohesive design environment.

• Implement and maintain version control systems for RTL design projects.

• Participate in design reviews and provide feedback on other team members' designs.

• Provide technical support to other teams. 

PREFERRED EXPERIENCE: 

• Well versed in Verilog and System Verilog with good understanding of RTL design flows
  
• Hands on experience with SOC design and integration of complex SOCs
• Using the tools in ASIC development such as Lint, CDC, Design Compiler and Primetime
• Good with Python/Perl, TCL and unix shell for design automation
• Familiarity with standard protocols as AXI-Stream and AXI-MM
• Familiarity with SystemVerilog and modern verification libraries like UVM

ACADEMIC CREDENTIALS: 

• Bachelors or Masters degree in computer engineering/Electrical Engineering 

#LI-K1

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SENIOR SOC DESIGN ENGINEER

THE ROLE: 

We are looking for an adaptive, self-motivative design engineer to join our growing team. As a key contributor, you will be part of a AI Engine Design team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The AI Group furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. 

THE PERSON: 

You have a passion for modern, complex processor architecture, digital design and delivering continuous improvement in flows through automation  in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES: 

• RTL Design: Designing and implementing digital logic circuits using Verilog or System Verilog

• IP Integration: Integrating and customizing IP blocks into SOC design.

• Work closely with the RTL design, verification, and physical design teams to identify areas for automation and create solutions to improve productivity and quality.

• Continuously improve the automation process by exploring new tools and technologies.

• Integrate various design tools and flows to create a cohesive design environment.

• Implement and maintain version control systems for RTL design projects.

• Participate in design reviews and provide feedback on other team members' designs.

• Provide technical support to other teams. 

PREFERRED EXPERIENCE: 

• Well versed in Verilog and System Verilog with good understanding of RTL design flows
  
• Hands on experience with SOC design and integration of complex SOCs
• Using the tools in ASIC development such as Lint, CDC, Design Compiler and Primetime
• Good with Python/Perl, TCL and unix shell for design automation
• Familiarity with standard protocols as AXI-Stream and AXI-MM
• Familiarity with SystemVerilog and modern verification libraries like UVM

ACADEMIC CREDENTIALS: 

• Bachelors or Masters degree in computer engineering/Electrical Engineering 

#LI-K1