Sr. Silicon Design Engineer

Sep 14, 2022
San Jose, Philippines
... Not specified
... Senior
Full time
... Office work

What you do at AMD changes everything

We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.

AMD together we advance_

As a member of the AECG PCIe and Serial Connectivity Team within AMD you will work on next generation PCIe / CXL and connectivity solutions to enable data center applications and fuel the data center transformation. Join us in creating leading edge PCIe technology to shape the future of data processing and cloud technologies. 

 

As a Senior Design Engineer, you will work as part of a team responsible for all phases of productization from definition to execution and customer release for PCIe products. Senior Design engineers are expected to understand the productization life cycle and development to meet market needs and deliveries. In this role you will coordinate cross-functionally with other teams to complete requirements and develop product features. This position requires excellent communication, delivery focus, technical expertise, and working through complex challenges and obstacles.

 

The main focus of the group can be classified into four broad categories.

  • Pre-Silicon test and validation for new PCIe enabled blocks
  • First silicon bring-up and test of new PCIe enabled blocks
  • End user productization including IP, documentation, and demo design creation
  • Market enablement for key markets that rely on PCIe enabled hard blocks

 

 

Requirements:

  • Experience with RTL design, simulation, system integration and debug
  • Strong knowledge of FPGA architecture and design flows
  • Excellent communication and cross functional coordination
  • Take a lead technical role in product development and delivery
  • Evaluating high level needs, feasibility and implementation
  • Contribute to process improvement and productivity
  • Rapidly root cause and resolve complex RTL issues
  • Experience with PCIe and/or DMA use is a plus

 

Education requirements:

  • Bachelor with 5 years or Master with 2 years working experience in RTL design, simulation, system integration and debug is preferred.

 

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Requisition Number: 183161 
Country: United States State: California City: San Jose 
Job Function: Design
  

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

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