WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

AMD together we advance_

THE ROLE: 

The focus of this role is to plan, build and design new features for AMD’s SerDes IP.

THE PERSON:  

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES:  

• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be implemented
• Design and development of the digital design using the most advance technology node as well as Silicon validation of the device using state of the art measuring equipment
• Estimate the time required to design the new feature tests and any required changes
• Debug test failures to determine the root cause; work with verification and firmware engineers to resolve bug reported and correct the design 
• Review functional and code coverage metrics

PREFERRED EXPERIENCE:  

• 7 years of ASIC development experience in a fast paced environment.
• Proficient in IP level ASIC design.
• Working knowledge of RTL coding and Digital simulation.
• Low power methodologies and impact on overall design goals.
• Able to work autonomously as well as in a team environment across multiple geographical sites, with a strong desire to succeed.
• Experienced in Static Timing Analysis tools (e.g. Prime Time) and constraint checkers.

ACADEMIC CREDENTIALS:  

• Bachelors or Masters degree in computer engineering/Electrical Engineering
   

LOCATION:

Singapore

#LI-SP2

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

The focus of this role is to plan, build and design new features for AMD’s SerDes IP.

THE PERSON:  

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES:  

• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be implemented
• Design and development of the digital design using the most advance technology node as well as Silicon validation of the device using state of the art measuring equipment
• Estimate the time required to design the new feature tests and any required changes
• Debug test failures to determine the root cause; work with verification and firmware engineers to resolve bug reported and correct the design 
• Review functional and code coverage metrics

PREFERRED EXPERIENCE:  

• 7 years of ASIC development experience in a fast paced environment.
• Proficient in IP level ASIC design.
• Working knowledge of RTL coding and Digital simulation.
• Low power methodologies and impact on overall design goals.
• Able to work autonomously as well as in a team environment across multiple geographical sites, with a strong desire to succeed.
• Experienced in Static Timing Analysis tools (e.g. Prime Time) and constraint checkers.

ACADEMIC CREDENTIALS:  

• Bachelors or Masters degree in computer engineering/Electrical Engineering
   

LOCATION:

Singapore

#LI-SP2