WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

AMD together we advance_

The Role:

We are looking for an adaptive, self-motivated senior design engineer/micro-architect, leader to join our growing team.  As a member of the SOC Microarchitecture and Design team, you will help bring to life cutting-edge designs, you will work closely with the architecture, Physical Design, and Design verification teams to achieve first pass silicon success.

The Person:

You have a passion for modern, complex microarchitecture, and efficient digital design. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

Key Responsibilities:

• Create front end SOC integration methodologies to automate building many SOCs quickly.
• Create IP reuse and modular SOC methodologies to automate building SOC from library of reusable IPs and configurable ARM IPs such as Cortex-A clusters/cores, CMN interconnects, GICs, SMMUs and other SOC IPs
• Expertise with IP-XACT models and SOC connectivity automation flows
• Familiar with tools such as Defacto, Magillem connectivity solutions, CoreTools    
• Work in cross-functional capacity with multiple teams and geographic locations
• Hands-on as well as opportunity to lead and collaborate across multiple areas including:
  • Close collaboration with architecture team to develop modular SOC microarchitectures for next-generation requirements
  • automation of SOC connectivity and integration
  •  Architectural Performance, Power, area, and schedule optimization
  •  AMBA-based Protocols (CHI, ACE, AXI) technical leadership expertise 
  •  Provide guidance for major new Front end design activities
  •  Technical Ownership of Design IP blocks and subsytems
  •  Work closely with verification and validation teams

Preferred Experience:

• Relevant and proven experience of RTL design, Verilog and SystemVerilog
• Experience with ARM Cortex-A cores, GICs, SMMUs, CMN and Arteris interconnects
• Deep knowledge of front-end tools (simulators, linters, CDC/RDC checkers)
• Validated experience with synthesis, static timing, DFT, is a plus
• Exposure to physical design and verification methods
• Experience with scripting languages including Perl, Python, Unix shells and Makefiles

Required Experience (Please do not apply unless you have):

• BS + 7 (or more) years of post-college experience, or MS + 5 (or more) years of experience, or PhD + 2 (or more) years of experience

Academic Credentials:

• Bachelor's Degree (CS, EE or related equivalent) 
• Desired: MS or PhD in Computer Science or Computer Engineering 

Location: San Jose, CA or Austin, TX

#LI-SH2

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

The Role:

We are looking for an adaptive, self-motivated senior design engineer/micro-architect, leader to join our growing team.  As a member of the SOC Microarchitecture and Design team, you will help bring to life cutting-edge designs, you will work closely with the architecture, Physical Design, and Design verification teams to achieve first pass silicon success.

The Person:

You have a passion for modern, complex microarchitecture, and efficient digital design. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

Key Responsibilities:

• Create front end SOC integration methodologies to automate building many SOCs quickly.
• Create IP reuse and modular SOC methodologies to automate building SOC from library of reusable IPs and configurable ARM IPs such as Cortex-A clusters/cores, CMN interconnects, GICs, SMMUs and other SOC IPs
• Expertise with IP-XACT models and SOC connectivity automation flows
• Familiar with tools such as Defacto, Magillem connectivity solutions, CoreTools    
• Work in cross-functional capacity with multiple teams and geographic locations
• Hands-on as well as opportunity to lead and collaborate across multiple areas including:
  • Close collaboration with architecture team to develop modular SOC microarchitectures for next-generation requirements
  • automation of SOC connectivity and integration
  •  Architectural Performance, Power, area, and schedule optimization
  •  AMBA-based Protocols (CHI, ACE, AXI) technical leadership expertise 
  •  Provide guidance for major new Front end design activities
  •  Technical Ownership of Design IP blocks and subsytems
  •  Work closely with verification and validation teams

Preferred Experience:

• Relevant and proven experience of RTL design, Verilog and SystemVerilog
• Experience with ARM Cortex-A cores, GICs, SMMUs, CMN and Arteris interconnects
• Deep knowledge of front-end tools (simulators, linters, CDC/RDC checkers)
• Validated experience with synthesis, static timing, DFT, is a plus
• Exposure to physical design and verification methods
• Experience with scripting languages including Perl, Python, Unix shells and Makefiles

Required Experience (Please do not apply unless you have):

• BS + 7 (or more) years of post-college experience, or MS + 5 (or more) years of experience, or PhD + 2 (or more) years of experience

Academic Credentials:

• Bachelor's Degree (CS, EE or related equivalent) 
• Desired: MS or PhD in Computer Science or Computer Engineering 

Location: San Jose, CA or Austin, TX

#LI-SH2