WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. 

AMD together we advance_

THE ROLE: 

The MTS Product Development Engineer position is in the FPGA implementation applications team, located in San Jose, for an experienced and motivated engineer to focus on tools specification, validation, documentation and key customers support. The successful candidate will work closely with both the R&D team and Emulation &  Prototyping customers on specific issues to improve Vivado implementation software quality of results, compile time and ease of use.

This is a specialized engineering position responsible for Product Engineering program technical planning for next-generation AMD microprocessors. This individual serves as a critical technical point of contact to the business, design, platform validation and product engineering teams. We have competitive benefit packages and an award-winning culture. Join us!  

THE PERSON: 

You will provide technical supervision or mentoring to junior engineers and influence others as a subject matter expert. A successful candidate is one who can drive technical decisions independently, has accountability for accuracy, reliability and completeness of assignment results critical to the project’s success. This role allows the opportunity to influence technical decisions that have a significant impact on multiple products or the product line.  

KEY RESPONSIBILITIES: 

• Actively exploring innovative methodologies and their impact on flow and design practices  

• Deep-diving on new and critical tool issues seen by customers to identify work-arounds and future enhancements

• Creating and tracking product development schedules and issues, and managing internal software development, as well as cross-functional projects with hardware, marketing and field support teams

• Interfacing with Senior Management, Quality, Tech Marketing and Application teams to ensure issues are resolved and corrective actions completed

• Developing and delivering training materials on new features and methodologies

• Authoring high quality documentation tuned to the needs of the reader for their areas of expertise

• Staying current with and proposing the internal use of industry approaches, algorithms, and practices

PREFERRED EXPERIENCE: 

• Has excellent working knowledge of RTL-based design flows and expectations

• Has excellent working knowledge of the entire FPGA or ASIC design process and tool flow, with in-depth expertise in timing analysis and closure. Has expertise in: HDL, Tcl (or Python), Timing and Physical Design Constraints (SDC/XDC), synthesis/placement/routing/verification tools

• Expert in design analysis, experimentation and methodology for timing closure and runtime reduction

• Ability to handle and solve complex system level issues, internally and with tier-1 customers

• Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear

ACADEMIC CREDENTIALS: 

• BS or equivalent work experience in Electrical Engineering or similar technology area, with several years of relevant experience

Location:

San Jose, Ca. 

#LI-JT1

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

At AMD, your base pay is one part of your total rewards package.  Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE: 

The MTS Product Development Engineer position is in the FPGA implementation applications team, located in San Jose, for an experienced and motivated engineer to focus on tools specification, validation, documentation and key customers support. The successful candidate will work closely with both the R&D team and Emulation &  Prototyping customers on specific issues to improve Vivado implementation software quality of results, compile time and ease of use.

This is a specialized engineering position responsible for Product Engineering program technical planning for next-generation AMD microprocessors. This individual serves as a critical technical point of contact to the business, design, platform validation and product engineering teams. We have competitive benefit packages and an award-winning culture. Join us!  

THE PERSON: 

You will provide technical supervision or mentoring to junior engineers and influence others as a subject matter expert. A successful candidate is one who can drive technical decisions independently, has accountability for accuracy, reliability and completeness of assignment results critical to the project’s success. This role allows the opportunity to influence technical decisions that have a significant impact on multiple products or the product line.  

KEY RESPONSIBILITIES: 

• Actively exploring innovative methodologies and their impact on flow and design practices  

• Deep-diving on new and critical tool issues seen by customers to identify work-arounds and future enhancements

• Creating and tracking product development schedules and issues, and managing internal software development, as well as cross-functional projects with hardware, marketing and field support teams

• Interfacing with Senior Management, Quality, Tech Marketing and Application teams to ensure issues are resolved and corrective actions completed

• Developing and delivering training materials on new features and methodologies

• Authoring high quality documentation tuned to the needs of the reader for their areas of expertise

• Staying current with and proposing the internal use of industry approaches, algorithms, and practices

PREFERRED EXPERIENCE: 

• Has excellent working knowledge of RTL-based design flows and expectations

• Has excellent working knowledge of the entire FPGA or ASIC design process and tool flow, with in-depth expertise in timing analysis and closure. Has expertise in: HDL, Tcl (or Python), Timing and Physical Design Constraints (SDC/XDC), synthesis/placement/routing/verification tools

• Expert in design analysis, experimentation and methodology for timing closure and runtime reduction

• Ability to handle and solve complex system level issues, internally and with tier-1 customers

• Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear

ACADEMIC CREDENTIALS: 

• BS or equivalent work experience in Electrical Engineering or similar technology area, with several years of relevant experience

Location:

San Jose, Ca. 

#LI-JT1