SOC DFT Technician(s) - (long-term contract with potential for full-time employment)

Mar 14, 2024
Markham, Canada
... Not specified
... Intermediate
Contract
... Office work

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

SOC DFT TECHNICIAN(S)

Note - roles vary in length up to two (2) years with potential to convert to full-time employment

 

THE ROLE:

We are seeking highly motivated and talented entry-level technicians to join our SOC (System-On-Chip)  DFX Block Level Scan & ATPG team. As an entry level technician, you will have the opportunity to work alongside experienced professionals in a dynamic and collaborative environment. You will contribute to the implementation and testing of block-level scan and ATPG strategies for our cutting-edge semiconductor products. 

 


THE PERSON:

  • Must have excellent written and verbal communication skills
  • Must excel in a dynamic team working environment
  • Must be a self-starter and be able to independently drive tasks to completion
  • Ability to be flexible in terms of responsibilities
     

KEY RESPONSIBILITIES:

The successful candidate will report to the SOC DFT (Design-For-Test) Scan & ATPG Manager and will have the following responsibilities:

 

  • End to End block-level Scan insertion and ATPG
  • Assist in the testing and validation of ATPG strategies to ensure high Test coverage and quality
  • Perform gate-level verification and validation of block-level ATPG patterns
  • Analyze test results and provide feedback for optimization and improvement
  • Collaborate with cross-functional teams to integrate block-level scan and ATPG solutions into overall product designs

 

QUALIFICATIONS:

  • Diploma in Electrical Engineering Technology, Computer Engineering technology, or related field
  • Basic understanding of digital design fundamentals and semiconductor concepts
  • Knowledge of Verilog, C/C++ and scripting languages; experience with Perl and TCL is a plus
  • Familiar with scan design techniques, ATPG algorithms, and DFT methodologies is an asset

 

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

SOC DFT TECHNICIAN(S)

Note - roles vary in length up to two (2) years with potential to convert to full-time employment

 

THE ROLE:

We are seeking highly motivated and talented entry-level technicians to join our SOC (System-On-Chip)  DFX Block Level Scan & ATPG team. As an entry level technician, you will have the opportunity to work alongside experienced professionals in a dynamic and collaborative environment. You will contribute to the implementation and testing of block-level scan and ATPG strategies for our cutting-edge semiconductor products. 

 


THE PERSON:

  • Must have excellent written and verbal communication skills
  • Must excel in a dynamic team working environment
  • Must be a self-starter and be able to independently drive tasks to completion
  • Ability to be flexible in terms of responsibilities
     

KEY RESPONSIBILITIES:

The successful candidate will report to the SOC DFT (Design-For-Test) Scan & ATPG Manager and will have the following responsibilities:

 

  • End to End block-level Scan insertion and ATPG
  • Assist in the testing and validation of ATPG strategies to ensure high Test coverage and quality
  • Perform gate-level verification and validation of block-level ATPG patterns
  • Analyze test results and provide feedback for optimization and improvement
  • Collaborate with cross-functional teams to integrate block-level scan and ATPG solutions into overall product designs

 

QUALIFICATIONS:

  • Diploma in Electrical Engineering Technology, Computer Engineering technology, or related field
  • Basic understanding of digital design fundamentals and semiconductor concepts
  • Knowledge of Verilog, C/C++ and scripting languages; experience with Perl and TCL is a plus
  • Familiar with scan design techniques, ATPG algorithms, and DFT methodologies is an asset

 

COMPANY JOBS
1645 available jobs
WEBSITE